Re: Branch prediction hints in an ISA

timgleason@my-deja.com wrote:
> Hey I was just thinking. Does anyone know of any Instruction Sets
> that have an extra bit in the branch instruction to be used as a
> "hint" for the branch prediction logic?


I don't think there'd be a need for a separate bit to store this hint
in. It's inherent in the choice of branching operation made by the
compiler, and the design of the CPU. If the CPU doesn't apply runtime
branch prediction, but still has speculative execution, it'll
pre-execute only one outcome of any given branch (either always
branch, or always not). Any sensible optimizing compiler is bound to
know about this, and will thus arrange the code to make sure that the
automatic choice by the CPU is more frequently correct than not.


A different way of looking at this would be that this bit is actually
present in many ISA's, thus: it's the bit that distinguishes between
the 'branch if' and 'branch if not' opcodes. If the compiler applies
those cleverly, that is.


--
Hans-Bernhard Broeker (broeker@physik.rwth-aachen.de)
[Evidently not, many architectures do have explicit static branch
prediction bits. -John]

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