|Seprerating algorithms from implementations (long) TSharp@Serif.com (Toby Sharp) (2000-08-27)|
|Re: Seprerating algorithms from implementations (long) firstname.lastname@example.org (Rob Hutchinson) (2000-09-08)|
|Re: Seprerating algorithms from implementations email@example.com (Tom Moog) (2000-09-09)|
|From:||Tom Moog <firstname.lastname@example.org>|
|Date:||9 Sep 2000 13:26:51 -0400|
|Originator:||email@example.com (Tom Moog)|
The hardware definition language VHDL allows one to separate a design
into an abstract design ('entity') and implementation(s)
An entity is similar to a C++ abstract base class.
What is special is that VHDL has the concept of configuration. You
instantiate a module and can specify in a number of ways what
architecture is to be used for each entity. In some cases this can
become rather complex - for instance one can implement factorial(N) by
using recursive configuration and instantiation.
The configuration step is called elaboration and occurs after
compilation and before linking, I think.
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