Re: Seprerating algorithms from implementations

The hardware definition language VHDL allows one to separate a design
into an abstract design ('entity') and implementation(s)
('architecture')


An entity is similar to a C++ abstract base class.


What is special is that VHDL has the concept of configuration. You
instantiate a module and can specify in a number of ways what
architecture is to be used for each entity. In some cases this can
become rather complex - for instance one can implement factorial(N) by
using recursive configuration and instantiation.


The configuration step is called elaboration and occurs after
compilation and before linking, I think.


Tom Moog
Polhode, Inc.

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