Re: Seprerating algorithms from implementations

Tom Moog <tmoog@polhode.com>
9 Sep 2000 13:26:51 -0400

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Re: Seprerating algorithms from implementations tmoog@polhode.com (Tom Moog) (2000-09-09)
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From: Tom Moog <tmoog@polhode.com>
Newsgroups: comp.graphics.algorithms,comp.compilers,comp.dsp
Date: 9 Sep 2000 13:26:51 -0400
Organization: Polhode Inc
References: 00-08-124 00-09-023
Keywords: design
Originator: tmoog@enteract.com (Tom Moog)

The hardware definition language VHDL allows one to separate a design
into an abstract design ('entity') and implementation(s)
('architecture')


An entity is similar to a C++ abstract base class.


What is special is that VHDL has the concept of configuration. You
instantiate a module and can specify in a number of ways what
architecture is to be used for each entity. In some cases this can
become rather complex - for instance one can implement factorial(N) by
using recursive configuration and instantiation.


The configuration step is called elaboration and occurs after
compilation and before linking, I think.


Tom Moog
Polhode, Inc.


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