| Related articles |
|---|
| Instruction scheduling rajeevc@mipos2.intel.com (1989-06-27) |
| Instruction Scheduling bron@bronze.wpd.sgi.com (1989-07-05) |
| Re: instruction scheduling budd@bu-it.BU.EDU (1989-07-11) |
| Instruction Scheduling horst@techfak.uni-bielefeld.de (1991-06-11) |
| Instruction Scheduling nandu@jupiter.cs.clemson.edu (1993-03-31) |
| Instruction Scheduling onufryk@eden.rutgers.edu (1995-04-18) |
| instruction scheduling kagha@po-box.mcgill.ca (Khurram Z. Agha) (1999-11-28) |
| Re: instruction scheduling ast@halcyon.com (Andrew Tucker) (1999-12-01) |
| From: | Andrew Tucker <ast@halcyon.com> |
| Newsgroups: | comp.compilers |
| Date: | 1 Dec 1999 23:39:46 -0500 |
| Organization: | WinStar NorthWest Nexus |
| References: | 99-11-161 |
| Keywords: | architecture, optimize |
Bob Morgan has a good discussion of scheduling and pointers to several
relevant papers in chapter 12 of _Building an Optimizing Compiler_.
Chapter 12 of Muchnick's _Advanced Compiler Design and Implementation_
has excellent coverage of this topic as well.
HTH
Khurram Z. Agha <kagha@po-box.mcgill.ca> wrote:
: A small Question regarding instruction scheduling. Where can I find more
: details about it, and is anyone aware of a good relevant web-site?
--
/* Andrew */
WWW: http://www.halcyon.com/ast
Email: ast@halcyon.com
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