|Cache access at compile time email@example.com (1999-11-16)|
|Re: Cache access at compile time Daniel.Vogelheim@post.rwth-aachen.de (Daniel Vogelheim) (1999-11-21)|
|Re: Cache access at compile time Sid-Ahmed-Ali.TOUATI@inria.fr (Sid Ahmed Ali TOUATI) (1999-11-28)|
|Re: Cache access at compile time firstname.lastname@example.org (Dan Truong) (1999-12-07)|
|From:||Daniel Vogelheim <Daniel.Vogelheim@post.rwth-aachen.de>|
|Date:||21 Nov 1999 23:24:59 -0500|
|Organization:||Aachen University of Technology (RWTH)|
> Can anyone give me pointers to way to ascertain the cache access
> patterns at compile time.
The Universitaet Saarbruecken has done research to predict cache
behaviour of programs in order to guarantee upper time bounds in hard
real time systems.
If I remember correctly they analyzed SPARC binaries and given a
particular cache architecture classified all memory accesses into
"always hits", "don't know", or "don't know first iteration, always
hits afterwards" (for loops). The restrictions for this system were
quite severe ( ? only static addresses could be predicted ? ), but
they seemed to work allright for the real time people.
If this sounds like what you want, you can check their papers at:
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