Re: how do a RISC compiler translate an array initialization ?

Sid Ahmed Ali TOUATI <Sid-Ahmed-Ali.TOUATI@inria.fr> writes:
> I try to understand memory access behavior of a simple code like:
>
> REAL X(200)
> for i=1, 200
> x(i)=2 <----- or any constant value
> end for
>
> I thought that this is equivalent to access every X element in each
> iteration, which yield to some cache miss equal to 50 in an ultra
> sparc II. My surprise was that the real number of misses (counted with
> specific registers) was about 3 or 4, with different compilers (cc,


The Ultrasparc data cache is write-through.
Store instructions generate no cache miss.


Pierre Michaud

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