|x86 register allocation firstname.lastname@example.org (1999-03-23)|
|Re: x86 register allocation email@example.com (1999-03-28)|
|Re: x86 register allocation firstname.lastname@example.org (Robert Sherry) (1999-03-28)|
|x86 register allocation email@example.com (Matt Postiff) (1999-03-28)|
|Re: x86 register allocation firstname.lastname@example.org (1999-03-28)|
|Re: x86 register allocation email@example.com (Sander Vesik) (1999-03-28)|
|Re: x86 register allocation firstname.lastname@example.org (Charles E. Bortle, Jr.) (1999-03-28)|
|Date:||23 Mar 1999 12:34:27 -0500|
|Organization:||Deja News - The Leader in Internet Discussion|
|Keywords:||architecture, 386, registers, question|
Can anyone give me a pointer to help me with x86 register allocation?
That wonderful Intel processor family has such register-specific instructions
(e.g. MUL result always goes into DX:AX) that I fear it will be difficult
to write an easy register allocation algorithm.
[On the 8086 to 286 it's a stinker since all the registers are different.
The 386 and later members of the family make the job somewhat easier due
to more complete register addressing modes. I don't know of any theory that
will help much, the graph coloring stuff is all intended for architectures
with more registers. -John]
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