|Latency of performance counters? email@example.com (Brandon Van Every) (1998-11-19)|
|From:||"Brandon Van Every" <firstname.lastname@example.org>|
|Date:||19 Nov 1998 23:25:20 -0500|
|Organization:||EarthLink Network, Inc.|
Are performance counters that report cache hits/misses and etc. fast
enough to be used at runtime as part of an ASM inner loop, to drive
the computation of an algorithm? Do they take on the order of 1's,
10's, or 100's of cycles to update? I'm sure it depends on the CPU
architecture, talk about your favorite one.
I'm curious if anyone has written any compilers which use performance
counters as a means of optimizing the code at runtime? I'm not
talking about statistically driven profiling, I'm talking about
algorithms that make cycle-by-cycle decisions based on the number of
cache hits/misses that are occurring.
Cheers, 3d graphics optimization jock
Brandon Van Every Seattle, WA
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