|Mixed Mode Execution and Register Allocation firstname.lastname@example.org (1998-05-15)|
|Re: Mixed Mode Execution and Register Allocation email@example.com (1998-05-23)|
|Re: Mixed Mode Execution and Register Allocation cliff.click@Eng.Sun.COM (Clifford Click) (1998-05-23)|
|Re: Mixed Mode Execution and Register Allocation firstname.lastname@example.org (John Pieper) (1998-05-30)|
|Re: Mixed Mode Execution and Register Allocation cliff.click@Eng.Sun.COM (Clifford Click) (1998-05-30)|
|From:||email@example.com (Andreas Krall)|
|Date:||23 May 1998 00:40:29 -0400|
|Organization:||Vienna University of Technology, Austria|
firstname.lastname@example.org (Hugh Leather) writes:
> I am looking for references to papers and views, about mixed
> mode execution. I am a computer science student and my final year
> project is to write a Java virtual machine.
My own research and other work too (Fast, Effective Code Generation in a
Just-In-Time Java Compiler, Adl-Tabatabai et al., PLDI'98) shows that
expensive register allocation algorithms in Java JIT's don't pay back
the higher compile cost at run time in most applications. One reason
is that the Java front end (javac) already does register allocation and
maps more local variables to the same location. In a JIT register
additional graph coloring register allocation may be beneficial only if
you do inlining of methods. In this case javac's mapping of locals is not
In the CACAO JIT compiler 493 local variables out of 5963 cannot be assigned
to registers (on an Alpha processors which has 7 callee saved registers).
Articles about the CACAO JIT can be found on my home page.
email@example.com Andreas Krall
http://www.complang.tuwien.ac.at/andi/ Inst. f. Computersprachen, TU Wien
tel: (+431) 58801/4462 Argentinierstr. 8/4/1851
fax: (+431) 5057838 A-1040 Wien AUSTRIA EUROPE
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