Summary: Instruction Scheduling

Jochen Leidner <>
30 Jan 1998 00:42:02 -0500

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From: Jochen Leidner <>
Newsgroups: comp.compilers
Date: 30 Jan 1998 00:42:02 -0500
Organization: Compilers Central
References: 98-01-068
Keywords: optimize, architecture, summary

A few weeks ago I was asking for references/links about instruction

I am indebted to the following people for their information:

                        Roman Hodek <>
                      Roland Kaufmann <>
      Christopher W. Milner <>
                      Philip Schielke <>
                        Kevin Scott <>
                    Andreas Unger <>
                      Andrea Vettori <>


* Several people suggested "Advanced Compiler Design And Implementation=
    (authored by Steve Muchnik. Morgan Kaufmann Publishers), which
    contains material about superscalar architectures and optimization.
    Chapter 17 describes instruction scheduling.

* Chris Milner and Kevin Scott suggested "Advanced Computer
    Architectures: A Design Space Approach" (by Sima/Fountain/Kacsuk)
    as an overview, which has
    "a nice chapter with a broad description of instruction scheduling=20=

    including basic block scheduling, loop unrolling and software
    pipelining, and global scheduling." (chapter 9)

* Kevin Scott also suggested the May 1993 issue of "The Journal of
    Supercomputing", which -- according to him -- contains "excellent=20
    references to the literature through 1993".

* Roman Hodek recommended "Code Scheduling and Optimization
    for a Superscalar X86 Microprocessor." Master's thesis,
    University of Illinois at Urbana-Champaign. =20

* Andreas Unger suggested "The GNU Instruction Scheduler" (by Michael
    D. Tiemann), a technical report about GNU GCC. He suggests to
    check out the papers by Rodeh at Haifa, and also led me to
    the following volume:

* G. B=F6ckle (ed.): Exploitation of Fine-Grain Parallelism.
    (Lecture Notes in Computer Science, 942)=20
    "The book addresses compiler writers, computer architects, and
    students by demonstrating the manifold complex relationships
    between architecture and compiler technology." (Springer)

* Andrea Vettori's pages
    <> (Italian) and
    <> (English)=20
    contain links on the topic.

* Phil Schielke send a lot of useful references:
    - "Software Pipelining: An Effective Scheduling Technique
        for VLIW Machines" (Monica Lam)
        Sigplan 32(7):318-28
    - "Trace Scheduling: A Technique for Global Microcode Compaction"
        (Joseph A. Fisher, 1981)
        IEEE Transactions on Computers, C-30(7):478-90
    - "A Brief Survey of Papers on Scheduling for Pipelined Processors"
        (Sanjay M. Krishnamurthy, 1990)
    - "The {Multiflow} Trace Scheduling Compiler"
        (P. Geoffrey Lowney et al., 1993)
        Journal of Supercomputing 7:51-142
    - "Code Scheduling for VLIW/Superscalar Processors with Limited
        Register Files"
        (Tokuzo Kiyohara & John C. Gyllenhaal, 1992)
        SIGMICRO Newsletter 23(12)
    - "Efficient Instruction Scheduling for a Pipelined Architecture",
        (Phillip B. Gibbons & Steven S. Muchnick, 1986)
        Sigplan 21(7):11-16
    - "Instruction Scheduling for the IBM RISC System/6000 Processor
        (H.S. Warren, Jr., 1990)
        IBM J R&D 34(1): 85-92
    - "Global Instruction Scheduling for Superscalar Machines"
        (David Bernstein & Michael Rodeh, 1991)
        Sigplan 26(6): 241-255
    - "Instruction Scheduling Beyond Basic Blocks"
        (M. C. Golumbic & V. Rainish, 1990)
        IBM J R&D 34(1): 93-97


Jochen Leidner <>

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