Re: Use of unaligned load/stores by compilers - or doing things by halves

Sazal wrote:
>
> I was wondering if anyone can point out the different capacities in
> which compilers use unaligned load/store instructions.
>
> [Fortran lets you use equivalence statements to misalign double precision
> floats, other than that I don't know of any languages where misaligned
> data will happen without extraordinary programmer effort. -John]


One of the "interesting" features of Sparc is that floating point
values passed as parameters may not be double word aligned. This is
on a processor that requires doubles to be double word aligned! For
a double which you cannot "prove" is adequately aligned, you have to
load each half separately, otherwise you may get a bus error. In
general, doubles in structures referenced by a pointer have to be loaded
by halves, since you may be handed a pointer to a mis-aligned
parameter structure.


(It also has the interesting feature that a double passed in a certain
place in the parameter list has one half passed in a register and the
other half passed on the stack!)


Some processors have implemented unaligned loads as extra-code traps.
(An extra-code is an instruction that is emulated in software). When I
worked on the 29000, which did this, I put a flag in the kernel to
enable the extra-code. By default you got a bus error. For developers,
this was usually the preferred result, since extra-code runs slowly;
sometimes, it is better that a program not run at all than that it run
slowly.
[The 486 and later Intel chips have an option to trap misaligned mem
refs, but I've never heard of anyone using it. Hmmn. -John]




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