Re: The RISC penalty (Ian Kemmish)
28 Dec 1995 11:52:47 -0500

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From: (Ian Kemmish)
Newsgroups: comp.compilers
Date: 28 Dec 1995 11:52:47 -0500
Organization: The Direct Connection
References: 95-12-063 95-12-077 95-12-103 95-12-112
Keywords: architecture, performance (David Keppel) writes:

>His group built a tool that instruments DEC Alpha/AXP binaries for
>Windows NT and also instruments Windows NT itself. They then ran the
>binaries and gathered ``snapshots'' of instruction and data references
>from the programs. The workload was SPEC92 and a TPS benchmark. Once

It's difficult to construct an experiment that *only* measures
the effect of instruction size on cache hit rate.

However, it is possible to contruct a very similar experiment, that
measures the effect of going from 32 bit pointers to 64 bit pointers,
by running the same benchmark code on an Alpha, running Windows NT and
then running OSF/1 (oops, sorry, they're calling it DEC UNIX this

I did this recently, and the difference in performance was <5%.

Unfortunately, until someone ports pixie to NT, it's impossible to
*know for sure* the numbers of instructions being executed in each
case, but both compilers are advertised as using the same code
generator, and a lot of the inner loopy code *looks* the same on both

[The benchmark was the Jaws PostScript interpreter running the most
recent verion of the PPST PostScript benchmark. As a RIP or printer
benchmark, PPST is not so hot, but it does exercise the cache...]

Ian Kemmish 18 Durham Close, Biggleswade, Beds SG18 8HZ Tel: +44 1767 601 361

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