|Re: Yikes!!! New 200Mhz Intel P6 Benchmarks email@example.com (1995-11-09)|
|From:||firstname.lastname@example.org (Andy Glew)|
|Keywords:||optimize, architecture, 586|
|Organization:||Intel Corp., Hillsboro, Oregon|
|References:||<email@example.com> <DHJ0Iw.9J@nntpa.cb.att.com> <47g76o$dr1@lace.Colorado.EDU> <firstname.lastname@example.org> <DHJG1H.email@example.com>|
|Date:||Thu, 9 Nov 1995 07:32:26 GMT|
>Mark Hahn <firstname.lastname@example.org> wrote:
>> [much deleted]
>>look folks, PDF is nothing magical, and it's certainly not the sole
>>reason that the P6 is showing up as so damned fast. PDF has been around
>>a long time - I think I first saw it on MIPS Rx000 compilers, circa
>>88 or so. PDF mostly just lets you predict branches a little better.
>Whatever it is in the compiler, it appears to have boosted the performance
>of the P5 as well. I haven't had a chance to check for myself, but it
>was said here that the P5 went from 155 to 190 SPECint92. Incidentally,
>the reported SPECint92 for the P6-150 MHz , 276 ~= 225 * 190/155
>where 225 was the reported SPECint92 for the chip in July.
Anecdote time: one of the most annoying things, as an architect
working with the compiler writers for P6, was that much of the time,
when we suggested a compiler optimization, intended to help P6, it
would often help P5 as well - often more than it helped P6!
Whattaya want to do: *NOT* improve the performance of your shipping
Andy "Krazy" Glew, email@example.com, Intel,
M/S JF1-19, 5200 NE Elam Young Pkwy, Hillsboro, Oregon 97124-6497.
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