|Re: Compiler support for a faster interrupt response ah739@cleveland.Freenet.Edu (1995-09-29)|
|Re: Compiler support for a faster interrupt response email@example.com (David Whalley) (1995-09-29)|
|Re: Compiler support for a faster interrupt response firstname.lastname@example.org (1995-09-29)|
|Re: Compiler support for a faster interrupt response email@example.com (1995-10-03)|
|Re: Compiler support for a faster interrupt response gary@Intrepid.COM (1995-10-06)|
|Re: Compiler support for a faster interrupt response firstname.lastname@example.org (Henry Dan Lambright) (1995-10-26)|
|From:||David Whalley <email@example.com>|
|Date:||Fri, 29 Sep 1995 11:16:35 GMT|
Ji Hoon Yoon stated:
Whenever interrupt occurs, it is basically true that
all global registers should be saved in the interrupt
prolog and restored in the epilog.
But in the case of 29K processor, nearly 40 ~ 50 registers
should be saved and restored at each interrupt, which, of course,
increses the interrupt response time.
Thus I want to survey various existing techniques for conquering this
heavy register saving/restoring problem.
Would you help me?
I suggest you look at the article:
%A J. Snyder
%A D. B. Whalley
%A T. P. Baker
%T Fast Context Switches: Compiler and Architectural Support for Preemptive Scheduling
%J Microprocessors and Microsystems
%D February 1995
We reduced the number of registers that would require saving and restoring
at context switch points. You can access the postscript for this paper
at either ftp.cs.fsu.edu:/pub/whalley/papers/mnm95.ps.Z or in
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