|retargetable code generation email@example.com (1995-04-28)|
|From:||firstname.lastname@example.org (Steven Bashford)|
|Keywords:||code, portable, question, DSP|
|Organization:||CS Department, Dortmund University, Germany|
|Date:||Fri, 28 Apr 1995 18:58:56 GMT|
I'm actually researching in techniques for retargetable code generation,
with support for non-regular architectures (like DSPs) with features like
- heterogeneous, distributed register sets and/or
- instruction level parallelism.
I`m looking for references in this area. I'm very interested in instruction
scheduling techniques that take into account timing constraints, and in
techniques that integrate code selection, register allocation and instruction
scheduling (phase coupling).
Thanks for any hint in advance,
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