Re: Register allocation for 8-bit processors?

Rajiv@ibeam.jf.intel.com (Rajiv Deodhar)
Tue, 14 Mar 1995 22:42:22 GMT

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Newsgroups: comp.compilers
From: Rajiv@ibeam.jf.intel.com (Rajiv Deodhar)
Keywords: registers, optimize
Organization: Intel Corporation
References: 95-03-057
Date: Tue, 14 Mar 1995 22:42:22 GMT

Torben AEgidius Mogensen writes:
> I will shortly be starting work on a register allocator for 8-bit
> processors. I intend to use a variant of graph colouring. I have
> identified some problems and found some plausible solutions to these,
> but wonder if anyone knows of any papers that discuss the following
> problems:
>
> 1) Values larger than 8 bits (16 and 32 bits are needed in my case)
> will be stored using a block of 2 or 4 registers, in some cases
> required to be aligned at 2 or 4 register borders.


Brian Nickerson's paper in SIGPLAN '90 Programming Language Design
and Implementation entitled "Graph Coloring Register Allocation for
Processors with Multi-Register Operands" discusses the Intel 80960
processor.


The 80960 has 32-bit registers but allows loads/stores/moves using
contiguous 2/3/4 registers aligned appropriately. Sounds like you could
adapt his technique to 8 bit registers.


Rajiv Deodhar
--


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