|Interpreters & Intermediate languages firstname.lastname@example.org (1994-04-13)|
|Re: Interpreters & Intermediate languages email@example.com (1994-04-13)|
|Re: Interpreters & Intermediate languages firstname.lastname@example.org (1994-04-19)|
|Re: Interpreters & Intermediate languages email@example.com (1994-04-21)|
|Re: Interpreters & Intermediate languages firstname.lastname@example.org (Bryan O'Sullivan) (1994-04-22)|
|Date:||Tue, 19 Apr 1994 16:23:37 GMT|
An interesting side-note on this: When DEC first started building VAXes
with no hardware PDP-11 emulation mode, the did a software PDP-11
emulator; it still ships with the VAX RSX product. The emulator made the
space/time tradeoff in a *big* way. Each PDP-11 instruction, including
the op code and the registers, fits in 16 bits. (Immediate constants
appear in the next 16 bits, but that never changes the interpretation of
the first 16.) So the emulator has a huge table of 65536 entries, each
entry a short code sequence that emulates one particular op code/address
mode/register combination. Many of the entries are just one short VAX
instruction; presumably, the table entry size is large enough for those,
and entries that need longer sequences branch to out-of-line code. It
helps that the VAX has twice the registers the -11 being simulated has, so
the 11's registers can be mapped right into VAX registers with plenty left
over for interpreter overhead.
This is probably about as fast as you can get in PDP-11 emulation. It's
also, in a sense, the threaded code interpreter to beat all threaded code
interpreters! Given the overhead to jump into the array and back again,
you probably could get a large speedup by replacing the -11 code with the
sequences from the table, though of course you'd have to adjust the
addresses - and it would fail for "tricky" code, e.g., old code that
stored the number of arguments passed in the word after a call instruction.
As an illustration of where we've come, consider that the table certainly
exceeds the physical addressing range of all early PDP-11 implementations!
It's also a great illustration of the power of tables to let you do a
great deal of your work up front, once and for all. This is something
compiler code generators could probably do a lot more of - in effect,
building a specialized very fast interpreter as a dispatch table.
[64K isn't a huge table. I know of an 8086 emulator which has a million
entry table, one entry for each address in the address space. If the
address is the head of a basic block that's been translated into native
machine code, it has the address of the translated code, otherwise it
points back into the translator. -John]
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