|Interpreters optimized for RISC machines? email@example.com (1994-02-22)|
|Re: Interpreters optimized for RISC machines? firstname.lastname@example.org (1994-02-24)|
|Keywords:||architecture, interpreter, question|
|Date:||Tue, 22 Feb 1994 21:34:14 GMT|
It would seem to me that stack-based interpreters would perform
extremely badly on modern RISC processors with many registers and
long latencies to access cache, let alone physical memory.
Has there been work done on interpretive engines which work in
this kind of environment particularly well? Especially ones which are
written in higher-level-languages; particularly "C". References
Michael J. Grier Digital Equipment Corporation
(508) 496-8417 email@example.com
Stow, Mass, USA Mailstop OGO1-1/E16
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