|Compiler positions available for week ending December 26 firstname.lastname@example.org (1993-12-26)|
|Date:||Sun, 26 Dec 1993 13:00:00 GMT|
This is a digest of ``help wanted'' and ``position available'' messages
received at comp.compilers during the preceding week. Messages must
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conform to the guidelines periodically posted in misc.jobs.offered.
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X-Organisation: Faculty of Mathematics & Computer Science
University of Amsterdam
NL-1098 SJ Amsterdam
X-Phone: +31 20 525 7463
X-Telex: 10262 hef nl
X-Fax: +31 20 525 7490
From: firstname.lastname@example.org (Pieter H. Hartel)
Subject: Two Ph.D. students computer architecture Delft/Amsterdam, NL
Date: 24 Dec 1993 15:20:45 GMT
Organization: FWI, University of Amsterdam
Two Ph.D. Students COMPUTER ARCHITECTURE/CODE GENERATION (OIO)
Delft University of Technology University of Amsterdam
Faculty of Electrical Engineering Faculty of Math. and Computer Science
Computer Architecture section Department of Computer Systems
The Faculty of Electrical Engineering The Faculty of Mathematics and Computer
of the Delft University of Technology Science of the University of Amsterdam
offers courses in Computer Science, offers courses in Mathematics, Computer
Information systems, Electronics, Science, Information systems,
VLSI design and technology, and Tele- Artificial Intelligence and Statistics.
Communication. The Faculty participates The Faculty participates in many
in many international collaborations international collaborations with
with universities as well as industry. universities as well as industry and
It has about 300 staff members and has 150 staff and about 550 students.
The Computer Architecture group of the
The Computer Architecture section Computer Systems department designs and
researches 3 areas: testing of digital builds application oriented
systems, neural network architectures, high-performance architectures. The
and the design of VLIW and MIMD archi- research covers many aspects, from
tectures for application specific pur- programmability and ease of use to
poses, together with the required com- hardware development and VLSI design.
Collaborative Research Project ICOS:
Intelligent COde Scheduling for Transport-Triggered Architectures
The objective of the ICOS project is to develop code generation techniques
capable of fully exploiting future instruction level parallel processing
systems. The research within the project centers around the usage of
annotations used in the compilation trajectory. These annotations assist the
compiler in such a way, that more and larger code motions are possible.
Key features of the ICOS project are:
o Use of language intelligence
Annotations can be added to the program, either automatically, or by hand, by
the programmer. In particular, ICOS will explore the automatic generation of
annotations for programs written in a pure functional style, using
intelligence about e.g. data types, which is available in functional
programs. We expect that similar techniques can be used in other program
domains, like the object oriented domain.
o Transport Triggered Architectures (TTAs)
The compilation methods are targeted to a newly developed class of
architectures, which is based on the principle of transport triggering. This
architecture class includes the class of Very Large Instruction Word (VLIW)
architectures, and is therefore able to exploit instruction level
parallelism. In contrast to traditional VLIWs, transport triggered
architectures are more flexible and scalable, use their hardware more
efficiently, and can be designed for very short cycle times (that enables a
large degree of superpipelining). Exploiting the extra capabilities of these
architectures requires special compiler optimisations, which will be
researched as part of ICOS.
o Flexible compiler framework
The developed compiler framework will be flexible in two ways: Firstly,
multiple languages (imperative, object oriented and functional) serve as
input, and secondly a large range of transport triggered architectures (and
VLIWs as subclass) serve as compilation target.
The ICOS project explores a new compilation philosophy, based on annotations
derived from either the programmer, or from builtin knowledge within specific
language domains. Based on these annotations, enhanced instruction scheduling
techniques will be developed which are able to exploit the extra freedom of
moving operations. This should reduce the currently increasing gap between the
amount of parallelism which hardware can offer and which current compilers can
* A good degree in computer science
* Experience in one or more of the following areas: compiler construction,
VLIW/superscalar code generation, functional languages, VLSI design
* An interest in both the practical implementation aspects as well as the
* The ability to work in a team.
One Ph.D. student will work in Delft on the backend of a C/C++ compiler for
TTAs and the other Ph.D. student will work in Amsterdam on the backend of a
compiler for a functional language to TTAs. The Ph.D. students are required to
work closely together.
Further information may be obtained from:
Drs. Henk Corporaal Dr. Pieter H. Hartel
phone: +31-15-785021 phone: +31-20-525 7566
Email: email@example.com Email: firstname.lastname@example.org
Applications quoting ``project ICOS'' must be sent to:
Bureau Personeel en Organisatie Personnel Dept.
Fac. der Electrotechniek Fac. of Math. and Computer Science
Techn. Univ. Delft Univ. of Amsterdam
Mekelweg 4 Plantage Muidergracht 24
2628 CD Delft 1018 TV Amsterdam
The Netherlands The Netherlands
Applications must arrive NO LATER THAN FEBRUARY 15th 1994.
The maximum period of employment is 4 years. The initial contract will be for
24 months, with an extension of no more than 24 months. The salary will start
at Dfl 1962 per month, raising over a 4 year period to Dfl 3499 per month.
Further particulars are available by anonymous ftp to ftp.fwi.uva.nl, file
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