|Cray-2 Fast Memory firstname.lastname@example.org (1993-05-13)|
|Re: Cray-2 Fast Memory email@example.com (1993-05-14)|
|Re: Cray-2 Fast Memory firstname.lastname@example.org (1993-05-26)|
|Re: Cray-2 Fast Memory email@example.com (1993-05-26)|
|Re: Cray-2 Fast Memory firstname.lastname@example.org (1993-05-27)|
|Re: Cray-2 Fast Memory email@example.com (1993-05-31)|
|From:||firstname.lastname@example.org (John R. Grout)|
|Organization:||UIUC Center for Supercomputing Research and Development|
|Date:||Fri, 14 May 1993 20:46:28 GMT|
email@example.com (Patrick Delano) writes:
>Apparently the Cray-2 had a fast memory that unlike cache memory was
>explicitly managed by the compiler. Can anyone tell me what software
>techniques were used, or point me to some references?
A recent paper to start with about how compilers can manage this sort of
thing is Allen and Kennedy's recent paper, "Vector Register Allocation",
IEEE Transactions on Computers, Vol 41, No. 10 (October 1992), pp.
1290-1317. This paper talks a lot about techniques to minimize the use of
temporary storage to one or several lengths of a vector register (which
obviously fits well with the availability of local memory). It also makes
references to other papers which discuss the use of local memory.
John R. Grout firstname.lastname@example.org
University of Illinois, Urbana-Champaign
Center for Supercomputing Research and Development
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