|Difficult CPU architectures email@example.com (1992-12-23)|
|From:||firstname.lastname@example.org (Toshiyasu Morita)|
|Organization:||Netcom - Online Communication Services (408 241-9760 guest)|
|Date:||Wed, 23 Dec 1992 07:41:36 GMT|
|Keywords:||architecture, question, comment|
I've yet to see a good 65816 C compiler and I was kind of wondering why...
Does the fact that it has only a single accumulator and two index
registers contribute significantly to the difficulty in generating good
code? Or perhaps the fact that all CPU registers are 16-bit, and the
address bus is 24-bits wide, and various addressing methods must be used
to span the entire 16 meg addressing range? Or maybe because of the
non-orthogonal CPU architecture where most of the addressing modes are
usable with one or the other index register, but not both? Or maybe
because the CPU has a "bank register" which controls the upper addressing
bits in certain addressing modes? Or maybe because certain addressing
modes only work on the first 64k of memory? Maybe the lack of hardware
multiply and divide instructions?
Any and all replies appreciated - thanks in advance.
[I'd attribute it more to the relatively small number of customers for a
65816 compiler. The Intel '86 line is nearly as difficult to compile for,
but there are plenty of compilers anyway. -John]
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