Compiler for Reconfiguration (Lalit K. Agarwal)
Wed, 25 Nov 1992 17:20:35 GMT

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Compiler for Reconfiguration (1992-11-25)
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Newsgroups: comp.compilers
From: (Lalit K. Agarwal)
Organization: Laboratory for Engineering Man/Machine Systems
Date: Wed, 25 Nov 1992 17:20:35 GMT
Keywords: C, GCC, hardware

We are working on a Reconfigurable Compiler to generate a Hardware
Synthesis Map of a C-function for a Xilinx FPGA (Field Programmable Gate
Array). The compiler would take a c-function as input, compile & optimize
it and store the information in some form of internal representation. This
representation is then fed into a Hardware Synthesizer which generates the
information for reconfiguring the Xilinx FPGAs.

We are thinking of using GCC (Gnu C compiler) as the front end to do the
parsing and perform the high-level compiler optimizations. Then we
considering using the RTL representation generated by GCC and building
some internal-representation of the program which stores all the
dependency information about the program.

There are still many issues about this approach which we haven't yet
resolved. We would appreciate any inputs & suggestions from people who
might have taken a similar approach to some form of hardware synthesis.

thanks in advance,

-Lalit K. Agarwal

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