Related articles |
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[3 earlier articles] |
Re: Register Files cliffc@cs.rice.edu (1992-10-06) |
Re: Register Files hobbs@steven.enet.dec.com (1992-10-06) |
Re: Register Files kendall@centerline.com (1992-10-07) |
Re: Register Files bart@cs.uoregon.edu (1992-10-07) |
Re: Register Files henry@zoo.toronto.edu (1992-10-07) |
Re: Register Files ali@LARK.WARP.CS.CMU.EDU (Ali-Reza Adl-Tabatabai) (1992-10-22) |
Re: Register Files idacrd!desj@uunet.UU.NET (1992-10-23) |
Newsgroups: | comp.compilers |
From: | idacrd!desj@uunet.UU.NET (David desJardins) |
Organization: | IDA Center for Communications Research, Princeton |
Date: | Fri, 23 Oct 1992 00:59:15 GMT |
Keywords: | registers, architecture |
References: | 92-10-019 92-10-084 |
>Having split register files also makes superscalar dispatch simpler. The
>dispatch stage need only check if the instructions are destined for
>different FU classes (integer, FP, etc...), without checking for register
>dependences (except for load and moves between register files).
Hey, I would just make that a hazard. Who needs to write into the same
register at the same time from both sides of the chip? (Let's see: say
that in the compiler newsgroup; stand back and watch the sparks fly!)
David desJardins
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