Re: Register Files (Henry Spencer)
Wed, 7 Oct 1992 16:56:37 GMT

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Newsgroups: comp.compilers,comp.arch
From: (Henry Spencer)
Organization: U of Toronto Zoology
Date: Wed, 7 Oct 1992 16:56:37 GMT
Keywords: registers, architecture
References: 92-10-019 (Steve Simmons) writes:
>... Since the CPU can write (or read) to (or
>from) only one register file on a cycle, having both floating point and
>integers gprs in the same register file would prohibit simultaneous
>execution of both floating point and integer operations.

Actually, not so. Or not necessarily so. There is no fundamental
difficulty in building multi-port register files; they are common.
Indeed, I'd say it's almost a certainty that Alpha's register file (more
correctly, the register file of the current implementation) is

Also, unless your floating-point stuff is really fast, it can spend a lot
of its time doing things that don't require register access. The AMD
29050 has a single register file and goes in quite extensively for
simultaneous integer and floating-point operations.

However, the general point is valid. The more ports on a register file,
the harder it is to build, and the bigger a bottleneck wiring becomes in
its vicinity. Ideally one would prefer lots of specialized register files
in specialized areas of the chip, making each one relatively small and
simple and minimizing wiring between the register file and the circuits
that use it. You can also get better use out of instruction bits if you
use context (e.g. type of instruction) to decide which register file is
being referred to.

The problem with this is that it's a headache for the compiler people,
partly because a crucial resource has been sliced up into chunks that
can't be used interchangeably, and partly because you start needing
explicit code to move data from one register file to another. So it's
mostly gone out of fashion... with one exception.

The exception, of course, is integer and floating point. Those types of
data don't mix much; the penalty for this split is not high. And it does
improve potential parallelism quite a bit, as well as doubling the
register count for a given instruction layout. So it's popular.
Henry Spencer @ U of Toronto Zoology, utzoo!henry

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