An instruction scheduler for Alpha

[I already sent this to comp.arch, on August 18, but jon@clevax.wec.com
points out to me that comp.compilers makes more sense.]


instr-sched.c has been added to the DEC/Alpha archives on
gatekeeper.dec.com and crl.dec.com. (gatekeeper is on the West Coast and
crl in on the East coast.) Look in ~ftp/pub/DEC/Alpha. (There is other
good stuff there too.) If you do not have ftp access, send mail to
ftpmail@pa.dec.com with subject: help


instr-sched.c is a basic block instruction scheduler for the Digital Alpha
21064-AA microprocessor.


Its purpose is to rewrite a basic block of alpha instructions in such a
way as to minimize stalls and maximize the number of multiple issue slots
kept full.


This scheduler would be useful, for example, in a compiler back-end or
optimizer.


A main program is attached which illustrates the operation of the
scheduling subroutine.


Actually the scheduler is not perfect, gcc's scheduler has been noted to
do a few cycles better in some cases, so there is still some work to be
done.


Larry Stewart
Cambridge Research Laboratory
Digital Equipment Corporation
--

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