An instruction scheduler for Alpha
Mon, 31 Aug 1992 15:20:45 GMT

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An instruction scheduler for Alpha (1992-08-31)
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Newsgroups: comp.compilers
Organization: Compilers Central
Date: Mon, 31 Aug 1992 15:20:45 GMT
Keywords: optimize, architecture

[I already sent this to comp.arch, on August 18, but
points out to me that comp.compilers makes more sense.]

instr-sched.c has been added to the DEC/Alpha archives on and (gatekeeper is on the West Coast and
crl in on the East coast.) Look in ~ftp/pub/DEC/Alpha. (There is other
good stuff there too.) If you do not have ftp access, send mail to with subject: help

instr-sched.c is a basic block instruction scheduler for the Digital Alpha
21064-AA microprocessor.

Its purpose is to rewrite a basic block of alpha instructions in such a
way as to minimize stalls and maximize the number of multiple issue slots
kept full.

This scheduler would be useful, for example, in a compiler back-end or

A main program is attached which illustrates the operation of the
scheduling subroutine.

Actually the scheduler is not perfect, gcc's scheduler has been noted to
do a few cycles better in some cases, so there is still some work to be

Larry Stewart
Cambridge Research Laboratory
Digital Equipment Corporation

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