Thu, 2 Jul 1992 19:43:44 GMT

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Signed vs Unsigned Operators us:elliot@wellspring.com (Elliot H. Mednick) (1992-07-02) |

Re: Signed vs Unsigned Operators macrakis@osf.org (1992-07-02) |

Newsgroups: | comp.compilers |

From: | macrakis@osf.org (Stavros Macrakis) |

Organization: | OSF Research Institute |

Date: | Thu, 2 Jul 1992 19:43:44 GMT |

Keywords: | types, syntax |

References: | 92-07-010 |

Mednick says:

I am looking for references to languages where the operator, not the

operands, determines if the operation should be signed or unsigned....

In Verilog, there is a data type, called REG, that is unsigned (since it

maps to real hardware registers). Therefore, arithmetic operations on

that type are unsigned as well (i.e. multiplication, division, right

shift, etc.).

Rather than adding signed/unsigned operators, why not think in terms of

type conversion? REG should probably be considered as of type

vector-of-bits, not as either signed or unsigned integer.

Common uses of REG might be signed integer (in one of a number of formats)

and unsigned integer, but there are others as well, such as floating-point

number (in one of a number of formats), vector of bytes, vector of BCD

digits, etc. Some bitwise operations (and, or, xor, ...) actually do

operate on vectors of bits.

So rather than have n(types) x n(operations) kinds of operator, why not

just have n(types) converter functions and n(operations) operations?

In your example, you'd say (for instance)

X = (sm) Y + (sm) Z.

This also permits expression format conversions and mixed-mode arithmetic

simply and consistently, e.g.

(tc) X = (sm) Y + (un) Z

where tc = two's complement, sm = sign-magnitude, un = unsigned

-s

--

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