|binary-compiler from Apple? firstname.lastname@example.org (1992-04-07)|
|Re: binary-compiler from Apple? email@example.com (1992-04-08)|
|Re: binary-compiler from Apple? firstname.lastname@example.org (1992-04-09)|
|Re: binary-compiler from Apple? email@example.com (1992-04-17)|
|From:||firstname.lastname@example.org (Henry Spencer)|
|Organization:||U of Toronto Zoology|
|Date:||Thu, 9 Apr 1992 02:05:48 GMT|
In article 92-04-030 email@example.com (Tng Tai Hou) writes:
>Apple is doing a binary-compiler for its new line of PowerPC Macs. It
>takes in existing 680x0 code and translate opcodes for the PowerPC chip.
>Can anyone tell me if this is logical, or right approach? Seems to be a
>great idea. Why hasn't anyone thought of it before?
It's been thought of many times, and has seen operational use. You can
buy commercial products that do this for x86 code in particular.
The main problem is performance, and how serious it is depends on the
nature of the two machines. Ideally, they should have the same byte
order, the "source" machine should have substantially fewer registers than
the "object" machine, and the "source" machine should not have condition
codes. Wrong byte order, inadequate registers, or the need to simulate
condition codes can result in very bulky and very slow code, unless
perhaps you optimize heavily. Mismatches in memory model can also be
troublesome; you'd really like addresses on the source machine to be
usable as-is on the object machine. One area where nobody has found a
good solution (that I know of) is mapping branch addresses that the
program computes in complex ways; the usual brute-force solution is a
table, one entry per possible source-machine branch target (that's one
entry for each and every instruction!), used to map computed branch
targets into the real targets.
Henry Spencer @ U of Toronto Zoology, firstname.lastname@example.org utzoo!henry
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