Re: SPARC compiler optimisation

dmk@craycos.com (David Keaton)
Thu, 27 Feb 92 11:54:13 MST

          From comp.compilers

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Newsgroups: comp.compilers
From: dmk@craycos.com (David Keaton)
Keywords: sparc, optimize
Organization: Cray Computer Corporation
References: 92-02-120
Date: Thu, 27 Feb 92 11:54:13 MST

          Well, bunching *all* the loads doesn't buy you much. SPARC load
pipelines are generally two or three levels deep. (Prisma tried to build
one with four levels, but that's history.) Therefore, you would be better
off with either "ld, ld, or, or, ld, ld, . . ." or "ld, ld, ld, or, or,
or, ld, ld, ld, . . ." depending on the depth of your particular load
pipeline. This would keep down register usage while still taking maximum
advantage of the load pipe.


          Depending on the implementation, each load is generally two or three
clocks long even if there is a cache hit. This can be cut down by
aligning on a 64-bit boundary and using ldd (load-double) instructions.
On implementations with a 64-bit bus, this doubles the througput. On
32-bit implementations, it adds only one clodk to the load instead of the
minimum two or three for a whole extra load instruction. Neither the Sun
nor the GNU compilers take advantage of this very well.


David Keaton
Cray Computer Corp.
dmk@craycos.com
--


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