|FL code generation for latest RISC chips firstname.lastname@example.org (1991-08-14)|
|From:||email@example.com (Robert Steven Turner)|
|Keywords:||question, functional, optimize|
|Organization:||Nyx, Public Access Unix (sponsored by U. of Denver Math/CS dept.)|
|Date:||Wed, 14 Aug 91 10:27:39 GMT|
Has anyone done any work on functional language code generation which
takes advantage of the facilities provided by the latest RISC chips?
I'm thinking in terms of code re-ordering, optimal use of integer and
FP units, optimal use of pipelines, etc. Do the chips have any
instructions especially suited to functional language execution?
Thanks for any info.
Rob Turner, Dept. of Computer Science, University of Hull, UK.
Internet: firstname.lastname@example.org Phone: (0482) 465212
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