|C Compilers which use full 486 capabilities firstname.lastname@example.org (Mick Carrick) (1991-03-13)|
|Re: C Compilers which use full 486 capabilities email@example.com (1991-03-15)|
|Re: C Compilers which use full 486 capabilities firstname.lastname@example.org (1991-03-15)|
|Re: C Compilers which use full 486 capabilities email@example.com (1991-03-16)|
|Re: C Compilers which use full 486 capabilities rex@aussie.COM (1991-03-17)|
|Re: C Compilers which use full 486 capabilities firstname.lastname@example.org (1991-03-18)|
|Re: C Compilers which use full 486 capabilities email@example.com (1991-03-19)|
|From:||firstname.lastname@example.org (Preston Briggs)|
|Organization:||Rice University, Houston|
|Date:||Fri, 15 Mar 91 17:35:51 GMT|
email@example.com (Tony Mason) writes:
>[quoting from Dr. Dobbs]
>"The 486 represents a fundamental break with 8088-style optimization.
>Virtually all the old rules fail on the 486, where, incredibly, a move
>to or from memory often takes just one cycle, but exchanging two
>registers takes three cycles."
Does anyone's compiler generate an exchange instruction? I can visualize
uses, but I'm not sure how I'd recognize it. I can imagine peephole
optimizers that could catch it, but generally, I dislike instructions with
more than 1 result.
How would it integrate with register allocation?
[As far as I can tell, most actual XCHG instructions are really test-and-sets
that set locks between processes or processors. -John]
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