|Real Compiler for One Instruction Computer? email@example.com (1988-11-23)|
|Re: Real Compiler for One Instruction Computer? gert@prls.UUCP (1988-11-29)|
|From:||firstname.lastname@example.org (Mark Davis)|
|Summary:||Has anyone ever seriously investigated this?|
|Keywords:||ZISC RISC SB compiler realized|
|Date:||23 Nov 88 14:25:19 GMT|
Recently on comp.arch there has been discussion of a zero instruction
set computer (ZISC) which actually is a one operation computer. One
architecture is the Subtract and branch on less that zero instruction
with 3 or 4 operands (I find some references to Van der Poel, 1956
for this construction).
Has anyone ever tried to write a compiler for such a machine or done
any significant simulations?
Thanks - Mark
[I've heard that in the 1950's there was a Ph.D. thesis implementing a
Fortran compiler for a Turing machine, which is sort of the same spirit.
but would be fascinated to hear of any other work in that vein. I suspect
it would be filed under theory of computation. -John]
[From email@example.com (Mark Davis)]
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