|Instruction Scheduling Complexity firstname.lastname@example.org (Stephan Ceram) (2008-09-30)|
|Re: Instruction Scheduling Complexity WebMaster@airspace-v.com (virtuPIC) (2008-10-24)|
|Date:||Fri, 24 Oct 2008 04:50:29 -0700 (PDT)|
|Posted-Date:||25 Oct 2008 06:37:09 EDT|
On 30 Sep., 22:57, Stephan Ceram <linuxkaf...@gmx.net> wrote:
> Unfortunately, it becomes not clear which complexity a local scheduler
> has for a multi-issue processor with a maximal latency of two
> cycles. This is exactly what I'm interested in. Do you have an idea
> what the complexity might be in that case? (Publications on that topic
> are highly welcomed).
If I remember correctly the problem of scheduling for a multi-issue
processor with maximum latency of more than one cycle is NP-complete.
Usually heuristical algorithms of run time linear in number of
instructions are used.
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