|ARM optimizations email@example.com (Tim Frink) (2008-10-18)|
|Re: ARM optimizations firstname.lastname@example.org (2008-10-20)|
|Re: ARM optimizations email@example.com (RR) (2008-10-21)|
|From:||firstname.lastname@example.org (Torben =?iso-8859-1?Q?=C6gidius?= Mogensen)|
|Date:||Mon, 20 Oct 2008 16:57:11 +0200|
|Organization:||Department of Computer Science, University of Copenhagen|
|Posted-Date:||22 Oct 2008 18:04:38 EDT|
Tim Frink <email@example.com> writes:
> I would like to see what sort of compiler optimizations are beneficial
> for an ARM processor (in particular the ARM7 family). For some other
> processors, like the PowerPC or Infineon TriCore, there are so-called
> "Compiler Writer's Guides" that tell a compiler writer what processor
> features should be taken into account to get a well optimized code.
> Are there also such type of documents for the ARM7 processor?
ARM Ltd. may have something in their documentation archive
(http://infocenter.arm.com/help/index.jsp), but I don't recall
anything specifically for compiler writers.
> Or do you know any other sources that deal with ARM7 compiler
ARM7 is a fairly straightforward pipelined architecture, so most of
the standard optimisations apply. Specific for ARM would be
optimising use of LDM/STM and conditional instructions, i.e.,
compiling short if-thens into conditional instructions instead of
jumping around the code.
As for LDM/STM, you would certainly use these in the prologue/epilogue
of procedures, but you can also use them to move structures between
registers and memory.
Since register-to-register moves are not "free" (as they nearly are on
some superscalar processors), you should try to avoid these, e.g., by
using a coalescing register allocator.
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