Related articles |
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Predict register usage plfriko@yahoo.de (Tim Frink) (2008-04-25) |
Re: Predict register usage cfc@shell01.TheWorld.com (Chris F Clark) (2008-04-25) |
Predict register usage inderaj@gmail.com (Inderaj Bains) (2008-04-26) |
Re: Predict register usage SidTouati@inria.fr (Sid Touati) (2008-04-28) |
Re: Predict register usage andreybokhanko@gmail.com (2008-05-02) |
Re: Predict register usage andreybokhanko@gmail.com (2008-05-02) |
Re: Predict register usage bfranke@inf.ed.ac.uk (=?ISO-8859-1?Q?Bj=F6rn_Franke?=) (2008-05-09) |
From: | andreybokhanko@gmail.com |
Newsgroups: | comp.compilers |
Date: | Fri, 2 May 2008 00:33:54 -0700 (PDT) |
Organization: | Compilers Central |
References: | 08-04-093 |
Keywords: | registers, optimize |
Posted-Date: | 03 May 2008 17:44:23 EDT |
My practical experience suggests that if you have a proper optimizing
compiler with lots of phases, you *can't* predict effects of inlining
on register allocation. There are too many phases between -- many of
them able to radically impact register allocation. You can't predict
all these phases.
I saw cases when a single additional strength reduction blew up
register allocation.
Andrey
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