shrey <>
Thu, 17 Jan 2008 21:22:34 -0800 (PST)

          From comp.compilers

Related articles
PRE and CISC (shrey) (2008-01-17)
Re: PRE and CISC (2008-01-18)
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From: shrey <>
Newsgroups: comp.compilers
Date: Thu, 17 Jan 2008 21:22:34 -0800 (PST)
Organization: Compilers Central
Keywords: registers, optimize, question
Posted-Date: 18 Jan 2008 00:50:02 EST

      I am wondering how compilers with aggressive PRE work for CISC
compilers. CISC instruction sets provide addressing modes where the
variable can be in symbolic form residing in memory. for example

add a, b, c - Registers need not be allocated.

Since PRE aims at trying to promote candidates into pseudo registers,
the subsequent passes may not have the opportunity to realize the
addressing mode (lets assume the addressing mode is sometimes
beneficial over using registers)

Two questions if somebody can help me find answers:
1. Are there any PRE algorithms that are aware of such addressing
modes ?
2. if not, how else can the subsequent passes recover so that they can
use these addressing modes?

Any pointers ?

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