|Work around ambiguities in LL(1) assembler parser email@example.com (=?iso-8859-1?b?RnLpZOlyaWM=?=) (2008-01-06)|
|Re: Work around ambiguities in LL(1) assembler parser firstname.lastname@example.org (SM Ryan) (2008-01-07)|
|Re: Work around ambiguities in LL(1) assembler parser DrDiettrich1@aol.com (Hans-Peter Diettrich) (2008-01-07)|
|Re: Work around ambiguities in LL(1) assembler parser email@example.com (Gene) (2008-01-07)|
|From:||Hans-Peter Diettrich <DrDiettrich1@aol.com>|
|Date:||Mon, 07 Jan 2008 07:41:16 +0100|
|Posted-Date:||07 Jan 2008 02:39:32 EST|
> LDA (data),Y ; #1 Indirect address indexed by Y
> index EQU 123
> LDA (index-1)*3,Y ; #2 Absolute address indexed by Y
> LDA 3*(index-1),Y ; Equivalent but non ambiguous
Are you sure that you got it right?
What processor do you have in mind (Z80, 6502, 6809...)?
IMO a unique addressing mode is specified by ",Y", where the first
operand specifies an absolute address. Then it depends on the processor,
how that address and the index register are combined, in order to form
the final address.
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