|[17 earlier articles]|
|Re: What is byte-code ? firstname.lastname@example.org (Nathan Moore) (2005-04-02)|
|Re: What is byte-code ? email@example.com (John Slimick) (2005-04-11)|
|Re: What is byte-code ? firstname.lastname@example.org (Chris Dollin) (2005-04-11)|
|Re: What is byte-code ? email@example.com (2005-04-11)|
|Re: What is byte-code ? firstname.lastname@example.org (Nathan Moore) (2005-04-16)|
|Re: What is byte-code ? email@example.com (glen herrmannsfeldt) (2005-04-16)|
|Re: What is byte-code ? firstname.lastname@example.org (2005-05-09)|
|Re: What is byte-code ? email@example.com (glen herrmannsfeldt) (2005-05-13)|
|From:||firstname.lastname@example.org (Ralph Corderoy)|
|Date:||9 May 2005 22:31:28 -0400|
|References:||05-03-015 05-03-125 05-04-005 05-04-037|
|Posted-Date:||09 May 2005 22:31:28 EDT|
Anton Ertl <email@example.com> wrote:
> Nathan Moore <firstname.lastname@example.org> writes:
> > This will save you about 2 jumps per instructoin since the jump tables
> > that are usually spit out by compilers are:
> > jump ip+(constant*case)
> > jump CODE_THAT_ACTUALLY_DOES_CASE_0
> > jump CODE_THAT_ACTUALLY_DOES_CASE_1
> > ...
> I have never seen that kind of code generated. Which compiler does it
> that way?
I've seen the Norcroft and gcc C compilers targetted at ARM generate
ldrb r1, [r11, #0]
cmp r1, #7
addls pc, pc, r1, lsl #2 ;
ldr r1, [r11, #&028]
mov r0, r11
With a 32-bit word, pc is already two words ahead of the current
instruction due to pipe-lining. This is the idiomatic jump table in ARM
and assembly programmers use it too.
> Big, dense switch statements have been translated into a range check,
> an array access (for the target address), and an indirect jump to the
> target in the code I looked at (usually by gcc).
The assembler above only works when the relative jump destination can be
encoded along with the b instruction in the 32-bit word.
Ralph Corderoy. http://inputplus.co.uk/ralph/ http://troff.org/
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