|Towards a 4 Teraflop microprocessor firstname.lastname@example.org (2005-02-11)|
|Re: Towards a 4 Teraflop microprocessor Juergen.Kahrs@vr-web.de (=?ISO-8859-1?Q?J=FCrgen_Kahrs?=) (2005-02-12)|
|Date:||12 Feb 2005 15:44:17 -0500|
|Posted-Date:||12 Feb 2005 15:44:17 EST|
> I'm a microprocessor designer, computer architect, and manager with 40
> years experience who has been developing for the last 3 years a single
> device vector uni-microprocessor initially targeting 4 TERA-FLOPS
> (DP). It is not targeted at supercomputer end; it is targeted for
> desktop. It's a vector co-processor that would be inserted into a
> workstation or PC and is intended to crunch numbers for applications
> that currently run for a fairly long time.
Let me play the Advocatus Diaboli: Who needs this ? In the mature
markets of the 21st century, brilliant designs like DEC Alpha and HP
PA have failed commercially and even Intel's Itanic will fail
eventually. Remember Transmeta's revolutionary "Morphing" design ?
Academics are free, of course, to breed new revolutionary
designs. Anyone taking part in such an enterprise will learn much from
this experience. But don't expect to see such a CPU design conquer
.. the Desktop market.
[I agree that nothing's likely to displace x86 any decade soon, but
I could see possibilities for attached processors for high performance
signal and image processing. This belongs in comp.arch which is where
I've directed followups. -John]
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