code optimization in VHDL compilers ?

srikanth.kamath@gmail.com (Srikanth Kamath)
24 Jan 2005 10:57:46 -0500

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From: srikanth.kamath@gmail.com (Srikanth Kamath)
Newsgroups: comp.compilers
Date: 24 Jan 2005 10:57:46 -0500
Organization: http://groups.google.com
Keywords: optimize, question
Posted-Date: 24 Jan 2005 10:57:46 EST

Hi all,
I'm working on Code optimizer for VHDL.I will be using 3 address code
as input to my optimizer program .Could you please suggest ways to
generate 3 address Code from a behavioural description ?
If you have worked on this /related area, please suggest useful
material /links
Thanks

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