|q: gcc backend condition codes firstname.lastname@example.org (Erez Doron) (2003-06-20)|
|Re: q: gcc backend condition codes email@example.com (Chris Dollin) (2003-06-22)|
|Re: q: gcc backend condition codes firstname.lastname@example.org (2003-06-25)|
|Re: q: gcc backend condition codes email@example.com (Michael Meissner) (2003-07-02)|
|From:||Chris Dollin <firstname.lastname@example.org>|
|Date:||22 Jun 2003 23:21:13 -0400|
|Posted-Date:||22 Jun 2003 23:21:13 EDT|
Erez Doron wrote:
> I'm trying to port gcc to a new processor.
> the assembeler does not have a flags register.
> instead, every instruction can be preceded with a condition.
> if r1>r2 mov r2,r1
> is a maximum function.
I don't know how to do it, but the ARM is like that, and isn't there
an ARM back-end for GCC already? So you could steal\\\\\re-use
whatever tactics they did.
Chris "very fond of the ARM instruction set" Dollin
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