Re: Efficient bytecode generation?

anton@mips.complang.tuwien.ac.at (Anton Ertl)
30 Mar 2003 00:46:19 -0500

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From: anton@mips.complang.tuwien.ac.at (Anton Ertl)
Newsgroups: comp.compilers
Date: 30 Mar 2003 00:46:19 -0500
Organization: Institut fuer Computersprachen, Technische Universitaet Wien
References: 03-03-096
Keywords: performance
Posted-Date: 30 Mar 2003 00:46:19 EST

"shahmil merchant" <shahmil_m@hotmail.com> writes:
>I was wondering if anyone could tell me some good resources which
>explain generation of bytecode and a corresponding interpreter for
>it. I have defined BNF grammar and have generated the .y and .l file
>for it and I am confused on how to approach code generation.


A simple way would be to use Vmgen
<http://www.complang.tuwien.ac.at/anton/vmgen/> (see also the
announcement in this group), which intends to be for virtual machine
interpreters what yacc is for parsers.


> What criteria do I need to consider for writing my own bytecode and
>instruction set.


Unless other criteria demand something else, go for simplicity. The
following design is relatively easy to implement in both the front end
(VM code generation), and in the interpreter, and is therefore used
frequently (e.g. in the JVM): Use a stack-based approach for
expressions, and communicate between statements with local variables.
The examples supplied with vmgen demonstrate that approach.


>[For a software interpreter, you'll probably find that a complex high-level
>bytecode is faster than a simple one, since the work in the interpreter
>of cracking and dispatching the codes is significant.


That depends on the kind of complex code; in the JVM, there are
complex instructions that do checks at run-time that could be done at
load time (maybe even at compile time). You can specialize these
instructions to simpler instructions, and gain speed.


Moreover, if you use Vmgen, you can use static superinstructions: You
specify that two (or more) instructions in sequence should be combined
into one superinstruction, and the VM code generation support combines
them automatically when the front end produced that VM instruction
sequence.


This encouraged us to replace some complex VM instructions with
sequences of simpler VM instructions. If the sequence occured often
enough, it would show up in profiling, and then the original complex
VM instructions would be reintroduced as superinstruction (this is
mostly automated by Vmgen).


- anton
--
M. Anton Ertl
anton@mips.complang.tuwien.ac.at
http://www.complang.tuwien.ac.at/anton/home.html


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