|[3 earlier articles]|
|Re: Selective Computation... email@example.com (Joachim Durchholz) (2002-12-31)|
|Re: Selective Computation... firstname.lastname@example.org (2003-01-17)|
|Re: Selective Computation... Patrick.Volteau@st.com (Patrick Volteau) (2003-01-20)|
|Re: Selective Computation... email@example.com (John R. Strohm) (2003-01-21)|
|Re: Selective Computation... firstname.lastname@example.org (Andreas Gieriet) (2003-01-21)|
|Re: Selective Computation... email@example.com (Florian Liekweg) (2003-01-21)|
|Re: Selective Computation... firstname.lastname@example.org (Marco van de Voort) (2003-02-06)|
|From:||Marco van de Voort <email@example.com>|
|Date:||6 Feb 2003 00:04:41 -0500|
|Organization:||Eindhoven University of Technology, The Netherlands|
|References:||02-12-116 03-01-077 03-01-102|
|Posted-Date:||06 Feb 2003 00:04:41 EST|
John R. Strohm wrote:
> The Texas Instruments floating-point DSP (320C30/C40, for example) have
> conditional load (and, I think, store) instructions. The compilers for
> these machines know about them and use them for this sort of thing. The
> 'C30/'C40 compilers are also very careful about branch scheduling.
Isn't conditional MOV (cmov) one of the few P6+ instructions?
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