GNU C keyword volatile, GNU compiler/optimizer and instruction re-ordering

"Arun" <Arun@Winphoria.Com>
19 Sep 2002 01:24:46 -0400

          From comp.compilers

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GNU C keyword volatile, GNU compiler/optimizer and instruction re-or Arun@Winphoria.Com (Arun) (2002-09-19)
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From: "Arun" <Arun@Winphoria.Com>
Newsgroups: comp.compilers
Date: 19 Sep 2002 01:24:46 -0400
Organization: Compilers Central
Keywords: optimize, C
Posted-Date: 19 Sep 2002 01:24:46 EDT

Greetings.




For sake of explaining the details, lets assume there is simple
device:


This device has two device specific registers accessible at
0x6000-0000 and 0x6000-0004. The first register is write-only, and the
second read-only, and writing to the first register simply makes the
same value available at the second register.


Also that the value written at the first address is accessible in the
same processor cycle (the two registers are simply hardwired
together).




Now, we have a C code as follows:


        some_function() {
                volatile int *ptr1 = 0x60000000;
                volatile int *ptr2 = 0x60000004;
                int val;
                ... ... ...
                *ptr1 = 0x1212abab;
                ... ... ...
                *ptr1 = 0xabcd1234;
                ... ... ...
                val = *ptr2; /* We expect to have 0xabcd1234
                                                assigned to val */
        }




Question is: can a C compiler/optimizer, specifically GNU C, re-order
the assignment of *ptr1 and val? In other words, can variable val get
assigned before *ptr1?


Of course, the assumption is that the code within this function is
such that there is no dependency between *ptr1 and *ptr2. So, the
compiler/optimizer cannot guess/notice any dependency to prevent a
re-ordering.


It would also be interesting to know the how the optimization levels
of GNU C affect re-ordering, if any.


Again in context of GNU C, is there any meaning to a voltile function?
(a guess is the optimizer does not re-order instruction in this case -
don't know if this is correct guess).


In the same context, can processor pipelines in general re-order the
instructions? Interesting cases may be the Intel's Pentium series and
Motorola PowerPC. What if possible/any, are the hints by the
compiler/optimizer to the processor?


TIA,
-Arun.
[The standard says that the generated code has to make all of the
references to volatile data, in the order the program makes them.
It also says that only lvalues can be volatile, so there's no such
thing as a volatile function. -John]



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