Branch prediction hints in an ISA

timgleason@my-deja.com
10 Oct 2000 13:08:14 -0400

          From comp.compilers

Related articles
Branch prediction hints in an ISA timgleason@my-deja.com (2000-10-10)
Re: Branch prediction hints in an ISA broeker@physik.rwth-aachen.de (Hans-Bernhard Broeker) (2000-10-12)
Re: Branch prediction hints in an ISA peter_flass@my-deja.com (2000-10-12)
Re: Branch prediction hints in an ISA djimenez@cs.utexas.edu (2000-10-12)
Re: Branch prediction hints in an ISA Kahrs.Juergen@stn-atlas.de (Juergen Kahrs) (2000-10-12)
Re: Branch prediction hints in an ISA erik@arbat.com (Erik Corry) (2000-10-12)
Re: Branch prediction hints in an ISA vbdis@aol.com (2000-10-12)
[5 later articles]
| List of all articles for this month |

From: timgleason@my-deja.com
Newsgroups: comp.compilers
Date: 10 Oct 2000 13:08:14 -0400
Organization: Deja.com - Before you buy.
Keywords: architecture, design, comment

Hey I was just thinking. Does anyone know of any Instruction Sets
that have an extra bit in the branch instruction to be used as a
"hint" for the branch prediction logic?


It seems to me that in some cases a compiler would know which path a
branch would likely take and could give a hint to the processor's
pipeline using an extra bit in the branch instruction (i.e. 1 =
usually branches, 0 = usually doesn't branch).


If the compiler could make good enough predictions, you might be able
to remove all the branch prediction logic from (and cache) from the
processor (and replace it with something else) and have similar
performance.




Just curious.


Thanks,
tim
[Yes, it's been done many times. IA-64, for example, has it. I gather
that static branch prediction is OK, but it's no substitute for dynamic
branch prediction. -John]


Post a followup to this message

Return to the comp.compilers page.
Search the comp.compilers archives again.