Compilers for Embedded Systems conference

Vincent Mooney <>
23 Mar 2000 22:30:05 -0500

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From: Vincent Mooney <>
Newsgroups: comp.compilers
Date: 23 Mar 2000 22:30:05 -0500
Organization: Compilers Central
Keywords: conference, CFP

                                            Call for Participation

                                                      CASES 2000
                                    International Conference on
          Compilers, Architectures and Synthesis for Embedded Systems


                                              November 17-19, 2000
                                                  Doubletree Hotel
                                                  San Jose, CA, USA

                                  Submission deadline August 14, 2000


          The purpose of this working conference, the third in the series,
is to provide a forum for discussing emerging technology themes in
embedded computing systems design.

          Over the past decade, substantial research has gone into the
design of general-purpose microprocessors embodying parallelism at
the instruction-level, as well as aggressive compiler optimization
and analysis techniques for harnessing this parallelism. Growing
demand for high performance in embedded systems is creating new
opportunities to leverage technologies such as instruction-level
parallelism (ILP) or Explicitly Parallel Instruction Computing (EPIC).
Examples of application areas with the need for high performance and
application specific embedded computing include set-top boxes,
hand-held games, mobile and web appliances, and advanced automotive

          However, several novel challenges have to be overcome in order
to harness the opportunities offered by emerging technologies in the
context of embedded systems. Constraints on cost, code size, weight,
power consumption and real-time requirements place stringent
requirements on processors and the software they execute. In addition,
design time is an important issue because of the growing demand for
rapid time-to-market.

        Technical as well as position papers espousing significant novel
ideas and technical results are solicited. Conference topics include
(but are not limited to) the following:

          * Novel architectures and micro-architectures for embedded
              systems based on ILP.
          * Automated design and synthesis of application or domain
              specific processors.
          * Application or domain specific designs.
          * Light-weight languages for temporal specification. Optimizing
              compilers for ILP exploitation in the presence of temporal
          * Synergy between extant parallel computing technologies, such as
              notations for expressing concurrency, and instruction level
              parallel processing.
          * Harnessing the interaction between the hardware and software
              layers, spurred by innovations in reconfigurable or adaptive
              computing systems.
          * Characterizing the need of research infrastructure development
              for embedded systems based on adaptive technologies.
          * Compiler Controlled Memory Hierarchy Management and Smart Caches.
          * System-on-a-Chip architectures/compilers and embedded software
              including heterogeneous multiprocessor embedded systems.
          * Compiler optimizations and synthesis for improved exploitation of
              power versus performance tradeoffs.

In addition to presentations, the conference will feature

      * Two keynote lectures by experts:

                Amir Pnueli, The Weizmann Institute and New York University

                B. Ramakrishna (Bob) Rau, Hewlett-Packard Labs

      * One expert panel on the following topic:

                System on a Chip: Hardware Dream or Software Nightmare?


          Please submit either one electronic copy of the paper in postscript
format to the following email address, or FIVE hard copies to the program
chair at the address given below. There is no page limit, but the paper
must not exceed 4000 words in length.

        E-mail address for submission:

Mail address for submission:

        Krishna V. Palem
        CASES 2000
        School of Electrical and Computer Engineering
        Georgia Institute of Technology
        801 Atlantic Drive
        Atlanta, GA 30332-0250


        Papers due: August 14, 2000
        Author notification: September 25, 2000
        Camera ready copy due: October 23, 2000


        Steering Committee:

                James R. Boddie, Lucent Technologies
                Guang R. Gao, University of Delaware
                Vinod Kathail, Hewlett-Packard Labs
                Edward Lee, University of California Berkeley
                Reid Tatge, Texas Instruments

        Conference Chair:

                Krishna Palem, Georgia Institute of Technology and New York University

        Local Arrangements Vice-Chair:

                Praveen Murthy, Angeles Design Systems

        Panels Vice-Chair:

                Jack Davidson, University of Virginia

        Publications Vice-Chair:

                Jaime Moreno, IBM T.J. Watson Research Center

        Publicity Vice-Chair:

                Vincent Mooney, Georgia Institute of Technology

        Program Committee:

                Shuvra S. Bhattacharyya, University of Maryland
                Henk Corporaal, Delft University of Technology
                Srinivas Devadas, Massachusetts Institute of Technology
                Christine Eisenbeis, INRIA Rocquencourt
                Antonio Gonzalez, Universitat Politecnica de Catalunya
                Rajesh Gupta, University of California at Irvine
                Nevin Heintze, Lucent Bell Laboratories
                Kathryn S. McKinley, University of Massachusetts, Amherst
                Lothar Thiele, ETH Zurich
                Frank Vahid, University of California at Riverside
                Wei Zhao, Star Core

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